1. Field of the Invention
The invention relates to the field of rotating magnetic computer disc memories. The invention proposes an improved subsystem architecture wherein a high-speed semiconductor memory of small size permits more rapid retrieval of information that is frequently accessed by the central processing unit.
2. Description of the Prior Art
Since the introduction of the System 360, a standard architecture has been established for the attachment of input/output devices to IBM central processing units. The central processing unit communicates via a "channel" with peripheral input/output devices. The channel interface permits connection of a storage control unit (SCU) which interprets the commands from the central processing unit and directs writing of information to or retrieval of information from disc devices. In practice, the SCU attaches to a disc controller which in turn can accommodate a plurality of rotating magnetic disc storage drives. A storage control unit of the type hereinabove discussed is the Memorex 3674 storage control unit (described in Memorex Publication 3674.21-00 entitled "3674 Storage Control Unit Theory of Operation"). A disc controller of the type hereinabove discussed is the Memorex 3673 disc controller (described in Memorex Publication 3673.21-02 entitled "3673/75/70 Disc Storage Subsystem Theory of Operation"). Disc storage devices of the type hereinabove discussed are the Memorex 3670 and 3675 disc drive modules (described in Memorex Publication 3673.21-02 entitled 3673/75/70 Disc Storage Subsystem Theory of Operation. The interconnection of the channel to the SCU disc controller and disc drive modules is described in Memorex Publication 3673/75/70 Disc Storage Subsystem Theory of Operations (Memorex Publication 3673.21-02).
It is also known in the prior art that a disc controller of the type exemplified by the Memorex 3673 disc controller with a plurality of disc drive modules attached thereto may be attached to a plurality of storage control units via a feature known as the string switch. The string switch feature is an array of hardware and microcode defining an intelligent interface which allows a plurality of storage control units to communicate with a single string of disc drives controlled by a 3673 type disc controller.
A request for storage of a particular piece of data or a request for retrieval of a particular piece of data is initiated by the channel. Through the storage control unit and the disc controller, the disc string will obtain access to the particular piece of information. However, a delay is involved in this process due to the mechanical and electronic configuration of the components. Particular to the mechanical configuration of the disc storage devices, magnetic read/write recording heads are rigidly affixed to a moving carriage which can access a plurality of prerecorded tracks on the disc spindle. A request for information often necessitates movement of the carriage carrying the read/write magnetic transducers to the track upon which the data is stored. The time for the carriage to complete such an access can be as little as ten (10) milliseconds or as great as fifty (50) milliseconds. In addition, once a particular track has been accessed and the carriage electronically locked into place by following the servo tracking information, another delay is encountered while the disc rotates to the proper position where the desired information is stored. Disc rotational delay or "latency" can be negligible or as great as approximately seventeen (17) milliseconds for discs rotating at 3600 RPM. On the average, latency amounts to a delay of approximately eight (8) milliseconds for discs rotating at 3600 RPM. Both the access time and latency delays can amount to significant overheads upon the performance of the central processing unit to accomplish its desired tasks.
In addition, disc storage devices by their nature only transfer information to the channel via the appropriate control devices at fixed data transfer rates. The data transfer rate is a function of the bit density of information stored upon the disc storage device and the rotational speed of the discs themselves. For the Memorex 3670 and 3675 products, the data transfer rate is nominally 806,000 bytes per second; however, the channel can often permit by its own limitations transfer rates much higher than 806,000 bytes per second. That is, the disc storage device is not making complete use of the maximum speed of the channel electronics, a fact of life that systems architects have learned to live with.
It is also known in the prior art that although disc storage devices are known as direct access storage devices (DASD), meaning that they can store or retrieve any particular piece of information in approximately the same elapsed time, users very frequently do not randomly store and retrieve information in a typical computer installation. In practice, the usage of disc storage devices is often "clustered" in time about particular sets of data. What this amounts to is that particular tracks of information in a disc storage device are frequently accessed or updated to the exclusion of hundreds of millions of bytes of other information. Thus, the concept of "caching" has been explored in the prior art as a means for storing more frequently accessed information in a high-speed buffer on the probability that that information will be accessed to the exclusion of most all other information currently in residence in much larger capacity direct access storage devices.
U.S. Pat. No. 4,075,686 to Calle, et al. and U.S. Pat. No. 4,070,706 to Scheuneman both describe system configurations utilizing a cache memory for the rapid access of priority information in order to enhance system performance. Both Calle, et al. and Scheuneman however do not specifically describe or suggest the application of a high-speed semiconductor cache memory to conventional disc string architecture. U.S. Pat. No. 3,949,369 to Churchill describes a digital computing system utilizing a high-speed cache buffer. Churchill points out that information in the cache buffer might practically be structured so that a priority system is established with respect to such information on the basis of its frequency of use. The most frequently used information would receive the highest priority and the least frequently used information would receive the lowest priority. If additional information needed to be stored within the high-speed cache memory and space was not available, the least frequently used information presently within the cache buffer would be erased. The concept of the least recently used (LRU) algorithm has been explored in the U.S. Pat. No. 3,737,881 to Corde, et al. Corde, et al. specifically addresses the requirements of application of the caching concept to "pages" of information in a high-speed magnetic bubble domain memory. "Pages" are understood in the computer industry to be predetermined blocks of a certain size dictated by the system control programming or operating system. In general, the introduction of virtual storage or virtual memory techniques as employed in the configuration of the system control programming or operating system has brought with it the concept of a high-speed storage which might be used for more rapid access of the central processing unit (CPU) to frequently used information as opposed to requiring access by the CPU to the much larger capacity direct access storage devices. A generally described paging system utilizing a high-speed cache memory in conjunction with a larger disc memory is described by U.S. Pat. No. 3,647,348 to Smith, et al. In addition, the concept of an "apparent store" is explored by U.S. Pat. No. 3,569,938 to Eden in which, again, high-speed storage is used as an intermediary buffer between the CPU and much larger main storage to enhance the performance of the CPU. However, all references as hereinabove cited specifically do not teach nor do they suggest the application of a high-speed semiconductor cache memory utilizing an LRU algorithm as might be efficiently applied to a disc string.